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ordering number : enn7307 d1803si (ot) no. 7307-1/19 overview the STK672-070 is a stepping motor driver hybrid ic that uses power mosfets in the output stage. it includes a built-in microstepping controller and is based on a unipolar constant-current pwm system. the STK672-070 supports application simplification and standardization by providing a built-in 4 phase distribution stepping motor controller. it supports five excitation methods: 2 phase, 1-2 phase, w1-2 phase, 2w1-2 phase, and 4w1-2 phase excitations, and can provide control of the basic stepping angle of the stepping motor divided into 1/16 step units. it also allows the motor speed to be controlled with only a clock signal. the use of this hybrid ic allows designers to implement systems that provide high motor torques, low vibration levels, low noise, fast response, and high-efficiency drive. this product is provided in a smaller package than sanyo's earlier stk672-040 for easier mounting in end products. applications ? facsimile stepping motor drive (send and receive) ? paper feed and optical system stepping motor drive in copiers ? laser printer drum drive ? printer carriage stepping motor drive ? x-y plotter pen drive ? industrial robots and other stepping motor applications features ? can implement stepping motor drive systems simply by providing a dc power supply and a clock pulse generator. ? one of five drive types can be selected with the drive mode settings (m1, m2, and m3) 2 phase excitation drive 1-2 phase excitation drive w1-2 phase excitation drive 2w1-2 phase excitation drive 4w1-2 phase excitation drive ? phase retention even if excitation is switched. ? provides the moi phase origin monitor pin. ? the clk input counter block can be selected to be one of the following by the high/low setting of the m3 input pin. rising edge only both rising and falling edges note*: conditions: v cc 1 = 24 v, i oh = 1.5 a, 2w1-2 drive used. continued on next page. package dimensions unit: mm 4186-sip15 1 15 46.6 41.2 12.7 25.5 (6.6) 14 5 2.0=28 3.6 0.5 2.0 8.5 4.0 0.4 2.9 1.0 [STK672-070] STK672-070 sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan unipolar constant-current chopper (external excitation pwm) circuit with built-in microstepping controller stepping motor driver (sine wave drive) output current: 1.5 a (no heat sink * ) thick-film hybrid ic any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein. sanyo: sip15
? the clk input pin includes built-in malfunction prevention circuits for external pulse noise. ? enable and reset pins provided. these are schmitt trigger inputs with built-in 20 k (typical) pull-up resistors. ? no noise generation due to the difference between the a and b phase time constants during motor hold since external excitation is used. ? microstepping operation supported even for small motor currents, since the reference voltage vref can be set to any value between 0 v and 1/2v cc 2. ? external excitation pwm drive allows a wide operating supply voltage range (v cc 1 = 10 to 45 v) to be used. ? current detection resistor (0.15 ) built into the hybrid ic. ? power mosfets for minimal driver loss ? motor output drive currents i oh up to 1.5 a. (at tc = 105 c) no. 7307- 2 /19 STK672-070 parameter symbol conditions ratings unit maximum supply voltage 1 v cc 1 max no signal 52 v maximum supply voltage 2 v cc 2 max no signal C0.3 to +7.0 v input voltage v in max logic input pins C0.3 to +7.0 v phase output current i oh max 0.5 seconds, single pulse, with v cc 1 applied. 2.0 a repeatable avalanche ear max 25 mj power loss pd max q c-a = 0 6.5 w operating ic substrate temperature tc max 105 c junction temperature tj max 150 c storage temperature tstg C40 to +125 c specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage 1 v cc 1 with input signals present 10 to 45 v supply voltage 2 v cc 2 with input signals present 5 5% v input voltage v ih 0 to v cc 2 v phase driver voltage handling v dss tr1, 2, 3, and 4 (the a, a, b, and b outputs) 100 (min) v phase current1 i oh 1 tc = 105 c, clk 3 200 hz 1.5 a phase current2 i oh 2 tc = 80 c, clk 3 200 hz 1.7 a allowable operating ranges at ta = 25 c parameter symbol conditions ratings unit min typ max control supply current i cc h-ic 6 input, with enable pin held low. 2.1 14 ma output saturation voltage vsat r l = 12 0.65 1.2 v average output current io ave load: r = 3.5 /l = 3.8 mh 0.445 0.5 0.56 a for each phase fet diode forward voltage vdf if = 1 a 1 1.8 v [control inputs] input voltage v ih except for the vref pin 4 v v il except for the vref pin 1 v input current i ih except for the vref pin 0 1 10 a i il except for the vref pin 125 250 510 a [vref input pin] input voltage v i pin7 0 2.5 v input current i i pin7, 2.5-v input 330 415 545 a [control outputs] output voltage v oh i = C3 ma, moi 2.4 v v ol i = +3 ma, moi 0.4 v electrical characteristics at tc = 25 c, v cc 1 = 24 v, v cc 2 = 5 v continued on next page. continued from preceding page.
no. 7307- 3 /19 STK672-070 parameter symbol conditions ratings unit min typ max [current distribution ratio (ab)] 2w1-2, w1-2, 1-2 vref q = 1/8 100 % 2w1-2, w1-2 vref q = 2/8 92 % 2w1-2 vref q = 3/8 83 % 2w1-2, w1-2, 1-2 vref q = 4/8 71 % 2w1-2 vref q = 5/8 55 % 2w1-2, w1-2 vref q = 6/8 40 % 2w1-2 vref q = 7/8 21 % 2 vref 100 % pwm frequency fc 37 47 57 khz continued from preceding page. note: a constant-voltage power supply must be used. the design target value is shown for the current distribution ratio.
14 13 15 12 11 10 9 8 6 7 5 4 3 2 + + 1 m1 m2 cwb clock m3 reset moi enable sub pg bb b ab a vref v cc 2 phase advance counter pwm control reference clock generation a13256 excitation mode control excitation state monitor current distribution ratio switching pseudo-sine wave generator rc oscillator phase excitation drive signal generation rise/fall detection and switching internal block diagram no. 7307- 4 /19 STK672-070
test circuit diagrams no. 7307- 5 /19 STK672-070 11 8 9 7 13 1 2 3 4 5 a rl ab b bb 6 + + v cc 2 v cc 2 STK672-070 start vref=2.5v v 1 2 3 4 5 a ab b bb 6 v cc 1 STK672-070 v a a13257 11 8 9 7 13 1 2 3 4 5 a a b a b ab b sw2 sw3 sw1 bb 6 15 v cc 2 vref enable v cc 1 v cc 1 STK672-070 start a13260 8 1 6 a a 2.5v v cc 2 m1 STK672-070 a13259 a13258 9 m2 12 m3 11 clk 10 cwb 14 13 reset 15 enable 7 vref a a fc i il i ih vsat vdf i ih , i il ioave, icc, fc for ioave measurement: set switch sw1 to the b position, provide the vref input and switch over switch sw2. for fc measurement: set sw1 to the a position, set vref to 0 v, and switch over switch sw3. for icc measurement: set the enable input to the low level.
no. 7307- 6 /19 STK672-070 7 5 a ab 6 14 14 8 14 14 9 14 14 12 15 11 13 10 14 + + v cc 2 = 5 v v cc 2 = 5 v sg 100 f or higher pg vref ro1 ro2 v cc 2 = 5 v clk enable cbw vf 0.3 v reset moi v cc 1 = 10 v to 45 v two-phase stepping motor STK672-070 a13261 b bb rox 4 3 2 1 ioave i ol i oh oa motor current waveform a13262 note: this hybrid ic must be initialized with a power on reset when power is first applied. operation description 2w1-2 phase excitation drive (microstepping operation) [setting the motor current] the motor current i oh is set by the vref voltage on the hybrid ic (h-ic) pin 7. the following formula gives the relationship between i oh and vref. rox = (ro2 6 k ) / (ro2 + 6 k ) ..................... (1) vref = v cc 2 rox / (ro1 + rox) ...................... (2) 1 vref i oh = ................................................... (3) k rs k: 5.16 (voltage divider ratio), rs: 0.22 (hybrid ic internal current detection resistor (precision: 3%)) applications can use motor currents from the current (0.05 to 0.1 a) set by the duty of the frequency set by the oscillator up to the limit of the allowable operating range, i oh = 1.5 a [function table] m2 0 0 1 1 m1 0 1 0 1 phase switching clock edge timing m3 1 2 phase excitation 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation rising edge only 0 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation 4w1-2 phase excitation rising and falling edges forward reverse cwb 0 1 enable motor current is cut off when low reset active low simple power on reset circuit (this circuit cannot be used for power supply voltage drop detection.) we recommend a value of about 100 for ro2 to minimize the influence of the vref pin internal impedance, which is 6 k . rox: input impedance: 6 k 30%
no. 7307- 7 /19 STK672-070 d1 rs l2 v cc 1 i off l1 mosfet and q s r 800 khz 45 khz latch circuit noise filter cr oscillator divider current divider vref a=1 + enable a (control signal) i on a13263 functional description external excitation chopper drive block description since this hybrid ic (h-ic) adopts an external excitation method, no external oscillator circuit is required. when a high level is input to ?a in the basic driver block circuit shown in the figure and the mosfet is turned on, the comparator + input will go low and the comparator output will go low. since a set signal with the pwm period will be input, the q output will go high, and the mosfet will be turned on as its initial value. the current i on flowing in the mosfet passes through l1 and generates a potential difference in rs. then, when the rs potential and the vref potential become the same, the comparator output will invert, and the reset signal q output will invert to the low level. then, the mosfet will be turned off and the energy stored in l1 will be induced in l2 and the current i off will be regenerated to the power supply. this state will be maintained until the time when an input to the latch circuit set pin occurs. in this manner, the q output is turned off and on repeatedly by the reset and set signals, thus implementing constant current control. the resistor and capacitor on the comparator input are spike removal circuit elements and synchronize with the pwm frequency. since this hybrid ic uses a fixed frequency due to the external excitation method and at the same time also adopts a synchronized pwm technique, it can suppress the noise associated with holding a position when the motor is locked. driver block basic circuit structure input pin functions pin no. symbol function pin circuit type 11 clk phase switching clock built-in pull-up resistor cmos schmitt trigger input 10 cwb rotation direction setting (cw/ccw) built-in pull-up resistor cmos schmitt trigger input 15 enable output cutoff built-in pull-up resistor cmos schmitt trigger input 8, 9, 12 m1, m2, m3 excitation mode setting built-in pull-up resistor cmos schmitt trigger input 13 reset system reset built-in pull-up resistor cmos schmitt trigger input 7 vref current setting input impedance 6 k (typ.) 30%
input signal functions and timing ? clk (phase switching clock) input frequency range: dc to 50 khz minimum pulse width: 10 s duty: 40 to 60% (however, the minimum pulse width takes precedence when m3 is high.) pin circuit type: built-in pull-up resistor (20 k , typical) cmos schmitt trigger structure built-in multi-stage noise rejection circuit function when m3 is high or open: the phase excited (driven) is advanced one step on each clk rising edge. when m3 is low: the phase moves on both the rising and falling edges of the clk signal, for a total of two steps per cycle. ? cwb (method for setting the rotation direction) pin circuit type: built-in pull-up resistor (20 k , typical) cmos schmitt trigger structure function when cwb is high: the motor turns in the clockwise direction. when cwb is low: the motor turns in the counterclockwise direction. notes: when m3 is low, the cwb input must not be changed for about 6.25 s before or after a rising or falling edge on the clk input. ? enable (controls the on/off state of the a, a, b, and b excitation drive outputs and selects either operating or hold as the internal state of this hybrid ic.) pin circuit type: built-in pull-up resistor (20 k , typical) cmos schmitt trigger structure function when enable is high or open: normal operating state when enable is low: this hybrid ic (h-ic) goes to the hold state and excitation drive output (motor current) is forcibly turned off. in this mode, the hybrid ic (h-ic) system clock is stopped and no inputs other than the reset input have any effect on the hybrid ic (h-ic) state. clk input acquisition timing (m3 = low) no. 7307- 8 /19 STK672-070 excitation counter up/down control output switching timing clk input system clock phase excitation counter clock control output timing a13264
? m1, m2, and m3 (excitation mode and clk input edge timing selection) pin circuit type: built-in pull-up resistor (20 k , typical) cmos schmitt trigger structure valid mode setting timing: applications must not change the mode in the period 5 s before or after a clk signal rising or falling edge. ? reset (resets all parts of the system.) pin circuit type: built-in pull-up resistor (20 k , typical) cmos schmitt trigger structure function: all circuit states are set to their initial values by setting the reset pin low. (note that the pulse width must be at least 10 s.) at this time, the a and b phases are set to their origin, regardless of the excitation mode. the output current goes to about 71% after the reset is released. notes: when power is first applied to this hybrid ic, vref must be established by applying a reset. applications must apply a power on reset when the v cc 2 power supply is first applied. ? vref (sets the current level used as the reference for constant-current detection.) pin circuit type: analog input structure function: constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a voltage less than the control system power supply voltage v cc 2 minus 2.5 v. applications can apply constant-current control proportional to the vref voltage, with this value of 2.5 v as the upper limit. mode setting acquisition timing no. 7307- 9 /19 STK672-070 m2 0 0 1 1 m1 0 1 0 1 phase switching clock edge timing m3 1 2 phase excitation 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation rising edge only 0 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation 4w1-2 phase excitation rising and falling edges mode switching timing excitation counter up/down clk input system clock mode setting m1 to m3 mode switching clock hybrid ic (h-ic) internal setting state phase excitation clock a13265 function:
no. 7307- 10 /19 STK672-070 output pin functions output signal functions and timing ? a, a, b, and b (motor phase excitation outputs) function: in the 4 phase and 2 phase excitation modes, a 3.75 s (typical) interval is set up between the a and a and b and b output signal transition times. pin no. symbol function pin circuit type 14 moi phase excitation origin monitor standard cmos structure
phase states during excitation switching ? excitation phases before and after excitation mode switching no. 7307- 11 /19 STK672-070 b 24 24 27 28 31 3 4 5 8 11 12 15 16 19 20 25 a a a 0 16 17 1 a a b b b 24 25 26 27 28 29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 24 26 28 30 0 2 4 6 8 10 12 14 16 18 20 22 22 23 a a b b 8 9 12 4 28 20 20 24 28 0 4 8 12 16 b 24 26 28 30 a a a 0 16 18 20 22 24 28 0 4 8 12 16 20 20 28 4 12 20 28 4 0 12 16 16 18 20 22 24 25 27 29 31 1 3 5 7 9 23 22 8 24 20 10 26 18 12 16 14 28 30 6 4 2 0 11 21 13 19 15 17 24 28 0 4 8 12 16 20 26 28 30 0 2 4 6 8 10 12 14 2 4 6 b b a b a b 30 2 26 6 10 14 22 18 a b a b a b a b b a a b b 8 10 12 14 12 4 28 20 2w1-2 phase ? 2 phase 2w1-2 phase ? 1-2 phase 2w1-2 phase ? w1-2 phase w1-2 phase ? 2 phase w1-2 phase ? 1-2 phase w1-2 phase ? 2w1-2 phase 1-2 phase ? 2 phase 1-2 phase ? w1-2 phase 1-2 phase ? 2w1-2 phase 2 phase ? 1-2 phase 2 phase ? w1-2 phase 2 phase ? 2w1-2 phase 24 0 8 16 20 22 30 28 4 12 20 14 28 4 12 a b a b 29 1 25 5 9 13 21 24 28 0 4 8 12 16 20 17 a b a b 29 5 4 12 20 6 13 21 28 17 a a b a b excitation phase immediately before setting the excitation mode excitation phase according to the first clock input pulse after changing the exc itation mode setting (m1 and m2) a13266
no. 7307- 12 /19 STK672-070 ? excitation phases before and after excitation mode switching b 24 23 24 25 28 29 0 1 4 5 8 9 12 13 16 17 20 21 a a a 0 16 15 31 a a b b b 24 25 26 27 28 29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 24 26 28 30 0 2 4 6 8 10 12 14 16 18 20 22 22 23 a a b b 8 7 12 4 28 20 20 24 28 0 4 8 12 16 b 24 30 a a a 0 16 22 24 28 0 4 8 12 16 20 20 28 4 12 16 28 24 20 0 4 12 16 18 20 22 24 25 27 29 31 1 3 5 7 9 23 22 8 24 20 10 26 18 12 16 14 28 30 6 4 2 0 11 21 13 19 15 17 24 28 0 4 8 12 16 20 26 28 30 0 2 4 6 8 10 12 14 6 b b a b a b 30 2 26 6 10 14 22 18 a b a b a b a b b a a b b 8 14 12 4 28 20 2w1-2 phase ? 2 phase 2w1-2 phase ? 1-2 phase 2w1-2 phase ? w1-2 phase w1-2 phase ? 2 phase w1-2 phase ? 1-2 phase w1-2 phase ? 2w1-2 phase 1-2 phase ? 2 phase 1-2 phase ? w1-2 phase 1-2 phase ? 2w1-2 phase 2 phase ? 1-2 phase 2 phase ? w1-2 phase 2 phase ? 2w1-2 phase 24 0 8 16 20 26 2 10 28 4 12 20 28 4 12 20 18 28 4 12 a b a b 30 3 27 7 11 15 23 24 28 0 4 8 12 16 20 19 a b a b 27 3 11 19 a b a b a13267
no. 7307- 13 /19 STK672-070 m1 0 m2 0 m3 reset cwb clk moi 0 1 2 phase excitation timing chart (m3 = 1) m1 1 0 1 0 m2 0 m3 reset cwb clk moi 1-2 phase excitation timing chart (m3 = 1) m1 1 1 0 m2 0 m3 reset cwb clk moi 0 w1-2 phase excitation timing chart (m3 = 1) m1 1 0 1 0 1 0 m2 m3 reset cwb clk moi 2w1-2 phase excitation timing chart (m3 = 1) mosfet gate signal comparator reterence voltage a a b b vref a vref b 100% 71% 100% 71% comparator reterence voltage vref a 100% 92% 71% 40% vref b 100% 92% 71% 40% moi comparator reterence voltage vref a 100% 92% 83% 71% 55% 40% 20% moi mosfet gate signal a a b b mosfet gate signal comparator reterence voltage a a b b vref a vref b 100% 71% 100% 71% mosfet gate signal a a b b vref b 100% 92% 83% 71% 55% 40% 20% a13268 excitation time and timing charts ? clk rising edge operation
? clk rising and falling edge operation no. 7307- 14 /19 STK672-070 m1 0 m2 0 m3 reset cwb clk mosfet gate signal comparator reterence voltage a a b b moi vref a vref b 100% 71% 100% 71% comparator reterence voltage vref a vref b 100% 92% 83% 71% 55% 40% 20% 20% 0 1-2 phase excitation timing chart (m3 = 0) m1 1 0 m2 0 m3 reset cwb clk 0 w1-2 phase excitation timing chart (m3 = 0) m1 0 m2 0 1 m3 reset cwb clk moi 100% 92% 83% 71% 55% 40% comparator reterence voltage vref a 100% 97% 88% 77% 66% 48% 31% 66% 48% 31% 14% 92% 83% 71% 55% 40% 20% 0 2w1-2 phase excitation timing chart (m3 = 0) m1 1 0 1 0 m2 0 m3 reset cwb clk moi 0 4w1-2 phase excitation timing chart (m3 = 0) mosfet gate signal a a b b mosfet gate signal comparator reterence voltage a a b b moi vref a vref b 100% 71% 40% 92% 100% 92% 71% 40% mosfet gate signal a a b b vref b 100% 97% 88% 77% 14% 92% 83% 71% 55% 40% 20% a13269
thermal design the main elements internal to this hybrid ic (h-ic) with large average power losses are the current control devices, the regenerative current diodes, and the current detection resistor. since sine wave drive is used, the average power loss during microstepping drive can be approximated by applying a waveform factor of 0.64 to the square wave loss during 2 phase excitation. the losses in the various excitation modes are as follows. fclock i oh fclock 2 phase excitation pd 2ex = (vsat + vdf) i oh t2 + (vsat t1 + vdf t3) 2 2 fclock i oh fclock 1-2 phase excitation pd 1-2ex = 0.64 {(vsat + vdf) i oh t2 + (vsat t1 + vdf t3)} 4 4 fclock i oh fclock w1-2 phase excitation pd w1-2ex = 0.64 {(vsat + vdf) i oh t2 + (vsat t1 + vdf t3)} 8 8 fclock i oh fclock 2w1-2 phase excitation pd 2w1-2ex = 0.64 {(vsat + vdf) i oh t2 + (vsat t1 + vdf t3)} 16 16 fclock i oh fclock 4w1-2 phase excitation pd 4w1-2ex = 0.64 {(vsat + vdf) i oh t2 + (vsat t1 + vdf t3)} 16 16 here, t1 and t3 can be determined from the same formulas for all excitation methods. Cl r + 0.35 Cl v cc 1 + 0.35 t1 = n (1 C i oh ) t3 = n () r + 0.35 v cc 1 r i oh r + v cc 1 + 0.35 however, the formula for t2 differs with the excitation method. 2 3 2 phase excitation t2 = C (t1 +t3) 1-2 phase excitation t2 = C t1 fclock fclock 7 15 w1-2 phase excitation t2 = C t1 2w1-2 phase excitation t2 = C t1 fclock 4w1-2 phase excitation fclock motor phase current model (2 phase excitation) fclock: clk input frequency (hz) vsat: the voltage drop of the power mosfet and the current detection resistor (v) vdf: the voltage drop of the body diode and the current detection resistor (v) i oh : phase current peak value (a) t1: phase current rise time (s) v cc 1: supply voltage applied to the motor (v) t2: constant-current operating time (s) l: motor inductance (h) t3: phase switching current regeneration time (s) r: motor winding resistance ( ) no. 7307- 15 /19 STK672-070 t3 t1 t2 i oh a13270
determine q c-a for the heat sink from the average power loss determined in the previous item. tc max: hybrid ic (h-ic) substrate temperature ( c) ta: application internal temperature ( c) pd ex : hybrid ic (h-ic) internal average loss (w) determine q c-a from the above formula and then size s (in cm 2 ) of the heat sink from the graphs shown below. the ambient temperature of the device will vary greatly according to the air flow conditions within the application. therefore, always verify that the size of the heat sink is adequate to assure that the hybrid ic (h-ic) back surface (the aluminum plate side) will never exceed a tc max of 105 c, whatever the operating conditions are. next we determine the usage conditions with no heat sink by determining the allowable hybrid ic (h-ic) internal average loss from the thermal resistance of the hybrid ic (h-ic) substrate, namely 25.5 c/w. 100 C 50 for a tc max of 105 c at an ambient temperature of 50 c pd ex = = 2.15 w 25.5 100 C 40 for a tc max of 105 c at an ambient temperature of 40 c pd ex = = 2.54 w 25.5 this hybrid ic (h-ic) can be used with no heat sink as long as it is used at operating conditions below the losses listed above . (see ? tc C p d curve in the graph.) the junction temperature, tj, of each device can be determined from the loss pds in each transistor and the thermal resistance q j-c. tj = tc + q j-c pds ( c) here, we determine pds, the loss for each transistor, by determining pd ex in each excitation mode. pds = pd/4 since the average loss includes the loss of the current detection resistor, we take that voltage drop into consideration in the calculation. vsat = i oh ron + i oh rs vdf = vdf + i oh rs the steady-state thermal resistance of a power mosfet is 19.2 c/w. tc max C ta q c-a = [ c/w] pd ex no. 7307- 16 /19 STK672-070 4 0 8 12 16 20 0 2 4 6 8 10 12 16 14 2 1.0 3 5 7 10 2 10 2 3 5 7 100 2 3 5 q c-a pd guaranteed ambient temperature 60 c 40 c 50 c heat sink thermal resistance, q c-a c/w heat sink thermal resistance, q c-a c/w q c-a s 2 mm al plate (no surface finish) (flat black surface finish) ic internal average power loss, pd w heat sink surface area, s cm 2 no. fin 25.5( c /w) no. fin 25.5( c /w) q c a= ( ( c/w) tc max = 105 c tc max ta pd vertical standing type natural convection air cooling
no. 7307- 17 /19 STK672-070 50 100 200 300 400 450 150 250 350 0 0 0.5 1.0 1.5 2.0 2.5 3.0 0 20 40 60 80 100 120 10 15 20 25 30 35 40 45 50 0.2 0.4 0.8 1.2 1.6 0.6 1.0 1.4 0 0.2 0.4 0.8 1.2 0.6 1.0 1.4 0 0.2 0.4 0.8 1.2 1.6 0.6 1.0 1.4 1.8 0 0 0.5 1.5 2.5 1.0 2.0 0 0.5 1.0 1.5 2.0 2.5 0 0.5 1.0 1.5 2.0 2.5 35 39 43 47 51 55 37 41 45 49 53 0 20 40 60 80 100 120 4.0 4.4 4.8 5.2 5.6 6.0 4.2 4.6 5.0 5.4 5.8 vsat i oh motor current , i oh ? a output saturation voltage , vsat v vdf ? i oh motor current , i oh a internal diode forward voltage , vdf ? v itf02185 itf02186 fc v cc 2 supply voltage , v cc 2 v pwm frequency , fc khz fc tc substrate temperature , tc ? c pwm frequency , fc khz itf02183 itf02184 35 39 43 47 51 55 37 41 45 49 53 i oh ? v cc 1 motor supply voltage , v cc 1 v motor current , i oh ? a i oh ? tc substrate temperature , tc ? c motor current , i oh ? a itf02187 itf02188 tc=105 c t est motor: pk244-01b 25 c tc=25 c 105 c t est motor: pk244-01b 0 20 40 60 80 100 120 50 100 200 300 400 450 150 250 350 0 ivref ? vref reference voltage , vref v reference voltage input current , ivref ? a ivref ? tc substrate temperature , tc ? c reference voltage input current , ivref ? a itf02189 itf02190 vref = 2.0v vref = 1.5v vref = 1.0v vref = 0.5v
no. 7307- 18 /19 STK672-070 0.5 1.0 2.0 1.5 2.5 5 10 20 30 40 15 25 35 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 10 20 40 60 30 50 70 80 90 0.2 0.4 0.8 1.2 1.6 1.8 2.0 0.6 1.0 1.4 0 10000 1000 2 3 5 7 100 2 3 5 7 100000 2 3 5 7 10 15 20 25 30 35 40 45 50 0 0 vref i oh motor current , i oh v reference voltage , vref v ? tc pd hybrid ic internal average power dissipation , pd w substrate temperature increase , ? tc c itf02191 itf02192 t est motor: pk244-01b v cc 1 =24v t est motor: pk264-01b v cc 1 =24v, v cc 2 =5v i oh =1a (with no heat sink) 0 20 40 60 80 100 120 0 substrate temperature rise test clk frequency , pps hz substrate temprature increase , ? tc c motor current i oh derating vs. operating substrate temperature tc. substrate temprature , tc c motor current , i oh a itf02193 itf02194 2ex 4w1-2ex notes ? the current ranges shown above apply when the output voltage is not in the avalanche range. ? the operating substrate temperature tc values shown above are measured during motor operation. since tc varies with the ambient temperature ta, the value of i oh , and whether i oh is continuous or intermittent, it must be measured in an actual operating system.
ps no. 7307- 19 /19 STK672-070 this catalog provides information as of december, 2003. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customers products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customers products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the delivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.

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